A portable readout system for silicon microstrip sensors
R. Marco-Hernández
Nuclear Inst. & Meth. A, Vol. 623, Issue 1, 1 November 2010, Pages 207-209
doi:10.1016/j.nima.2010.02.197
Abstract: This system can measure the collected charge in one or two microstrip silicon sensors by reading out all the channels of the sensor(s), up to 256. The system is able to operate with different types (p- and n-type) and different sizes (up to 3 cm2) of microstrip silicon sensors, both irradiated and non-irradiated. Heavily irradiated sensors will be used at the Super Large Hadron Collider, so this system can be used to research the performance of microstrip silicon sensors in conditions as similar as possible to the Super Large Hadron Collider operating conditions. The system has two main parts: a hardware part and a software part. The hardware part acquires the sensor signals either from external trigger inputs, in case of a radioactive source setup is used, or from a synchronised trigger output generated by the system, if a laser setup is used. The software controls the system and processes the data acquired from the sensors in order to store it in an adequate format. The main characteristics of the system are described. Results of measurements acquired with n- and p-type detectors using both the laser and the radioactive source setup are also presented and discussed.
A beam test telescope based on the Alibava readout system
R. Marco-Hernandez, (for the Alibava Collaboration)
IEEE Nuclear Science Symposium and Medical Imaging Conference, (IEEE-NSS-MIC) Oct.-Nov, 2010
IEEE NSS-MIC Conference Record, pp.749-754,
doi: 10.1109/NSSMIC.2010.5873858
Abstract: A telescope for a beam test have been developed. The system is intended to measure the spatial resolution performance of different types of silicon detectors. The telescope has four XY measurement as well as trigger planes (XYT board). It can accommodate up to twelve devices under test (DUT board). The DUT board uses two ASIC chips for the readout of chilled DUT, microstrip or pixel silicon detectors. The XYT board triggers on the particle tracks in the beam test. It also measures the track space points using two silicon strip detectors connected to two ASIC chips. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and clock signal. A master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.
Characterization of irradiated P-type silicon detectors by the ALIBAVA system
M. Miñano, C. García, C. Lacasta, R. Marco-Hernández, S. Martí-García, U. Soldevila
Nuclear Inst. & Meth. A, Vol. 617, Issues 1–3, 11–21 May 2010, Pages 565-567
doi:10.1016/j.nima.2009.09.040
Abstract: The ATLAS Tracker System has been designed to withstand the radiation doses accumulated with 10 years of running at a LHC luminosity of 
. The operation under an upgraded luminosity of 
(superluminous LHC) implies to upgrade the semiconductor tracking systems of the LHC experiments. The expected dose for the inner detector trackers at the superluminous LHC experiments is up to 
equivalent neutron cm-2 after the envisaged five years of operation. Investigations have showed arguments in favour of implementing the n-type strip readout on a p-type substrate (currently the Semiconductor Tracker, SCT, uses p-type strip readout on a n-type substrate). In order to evaluate the radiation damage p-type microstrip sensors have been irradiated with neutrons and protons at several fluxes up to 
. Electrical and charge collection efficiency measurements have been carried out by means of a radioactive source setup as well as by an infrared laser illumination and the measurements compared with a non-irradiated sensor as a reference. The ALIBAVA acquisition system has been used. It is a compact and portable system which contains two front-end readout ASIC chips to acquire the detector signals. One of the advantages of the ALIBAVA system is that it uses LHC speed electronics. Another one is that it performs a pulse by pulse and strip by strip analysis.
A module concept for the upgrades of the ATLAS pixel system using the novel SLID-ICV vertical integration technology
M. Beimforde, L. Andricek, A. Macchiolo, H.-G. Moser, R. Nisius, R. H. Richter, P. Weigell
Journal of Instrumentation, 2010, Vol. 5, Issue 12, Article C1202
doi: 10.1088/1748-0221/5/12/C12025
Abstract: The presented R&D activity is focused on the development of a new pixel module concept for the foreseen upgrades of the ATLAS detector towards the Super LHC employing thin n-in-p silicon sensors together with a novel vertical integration technology. A first set of pixel sensors with active thicknesses of 75 μm and 150 μm has been produced using a thinning technique developed at the Max-Planck-Institut für Physik (MPP) and the MPI Semiconductor Laboratory (HLL). Charge Collection Efficiency (CCE) measurements of these sensors irradiated with 26 MeV protons up to a particle fluence of 1016neqcm−2 have been performed, yielding higher values than expected from the present radiation damage models. The novel integration technology, developed by the Fraunhofer Institut EMFT, consists of the Solid-Liquid InterDiffusion (SLID) interconnection, being an alternative to the standard solder bump-bonding, and Inter-Chip Vias (ICVs) for routing signals vertically through electronics. This allows for extracting the digitized signals from the back side of the readout chips, avoiding wire-bonding cantilevers at the edge of the devices and thus increases the active area fraction. First interconnections have been performed with wafers containing daisy chains to investigate the efficiency of SLID at wafer-to-wafer and chip-to-wafer level. In a second interconnection process the present ATLAS FE-I3 readout chips were connected to dummy sensor wafers at chip-to-wafer level. Preparations of ICV within the ATLAS readout chips for back side contacting and the future steps towards a full demonstrator module will be presented.
Development of a beam test telescope based on the Alibava readout system
Marco-Hernández R. (On behalf of the ALIBAVA Collaboration)
Topical Workshop on Electronics for Particle Physics, TWEPP. Aachen (Germany), Sep. 2010
doi:10.1088/1748-0221/6/01/C01002
Abstract: A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectrónica (CNM) of Barcelona and Instituto de Física Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two ASIC chips for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two ASIC chips. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.